Phase noise in a back-gate biased low-voltage VCO

The phase noise in an ultra low-power and low-voltage CMOS voltage controlled oscillator (VCO) has been measured and modelled for supply voltage VDD from 1.8 V down to 80 mV with various body bias voltages V B ~ The VCO is a fully integrated ring oscillator designed in a 0.18pm CMOS technology. In this design, the frequency can be controlled by VBp The effects of scaling VDD together with the effect of VBs on the phase noise are examined experimentally and theoretically. It has been observed that the phase noise at VDD >0.5 V is dominated by the upconverted l/f noise. But the low frequency noise disappears when VDD decreases below 0.5 V. Application of forward body bias voltages from 0 to 0.6 V also provides a practical method to suppress the low frequency noise being upconverted to phase noise.